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David
2012-07-05 19:39:34 +00:00
parent d4098d43e2
commit d311c72989
31 changed files with 40659 additions and 0 deletions
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50
branches/SCH v1.0 PCB v0.4/PowerLock EL/Simulations/Load Dump - NPN Pass.asc Normal file
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Version 4
SHEET 1 880 680
WIRE -16 48 -112 48
WIRE 48 48 -16 48
WIRE 192 48 128 48
WIRE 208 48 192 48
WIRE 384 48 304 48
WIRE 416 48 384 48
WIRE -16 128 -16 48
WIRE 48 128 -16 128
WIRE 256 128 256 112
WIRE 256 128 128 128
WIRE -112 144 -112 48
WIRE 416 144 416 48
WIRE 256 160 256 128
FLAG -112 224 0
FLAG 256 224 0
FLAG 416 224 0
FLAG 384 48 Vout
FLAG -112 48 Vin
FLAG 192 48 Vc
SYMBOL voltage -112 128 R0
WINDOW 3 -11 138 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value EXP(24 56 2ms 1ms 0s 200ms)
SYMBOL zener 272 224 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value DFLZ33
SYMBOL res 144 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1
SYMATTR SpiceLine pwr=.25w
SYMBOL res 400 128 R0
SYMATTR InstName R2
SYMATTR Value 500
SYMBOL npn 208 112 R270
SYMATTR InstName Q1
SYMATTR Value 2N3904
SYMBOL res 144 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 470
TEXT 30 286 Left 2 !.tran 2s