diff --git a/trunk/PowerLock EL/Schematic/PowerLock_PIC.brd b/trunk/PowerLock EL/Schematic/PowerLock_PIC.brd
index 2288b5b..afdc90b 100644
Binary files a/trunk/PowerLock EL/Schematic/PowerLock_PIC.brd and b/trunk/PowerLock EL/Schematic/PowerLock_PIC.brd differ
diff --git a/trunk/PowerLock EL/Schematic/PowerLock_PIC.sch b/trunk/PowerLock EL/Schematic/PowerLock_PIC.sch
index e57c8b9..7cd893d 100644
Binary files a/trunk/PowerLock EL/Schematic/PowerLock_PIC.sch and b/trunk/PowerLock EL/Schematic/PowerLock_PIC.sch differ
diff --git a/trunk/PowerLock EL/Simulations/LT3690_DC1520A.asc b/trunk/PowerLock EL/Simulations/LT3690_DC1520A.asc
index a116241..00e0432 100644
--- a/trunk/PowerLock EL/Simulations/LT3690_DC1520A.asc	
+++ b/trunk/PowerLock EL/Simulations/LT3690_DC1520A.asc	
@@ -66,7 +66,7 @@ SYMATTR InstName L2
 SYMATTR Value 18µ
 SYMBOL res 432 368 R0
 SYMATTR InstName R4
-SYMATTR Value 348K
+SYMATTR Value 360K
 SYMATTR SpiceLine tol=1 pwr=.1
 SYMBOL res 432 464 R0
 SYMATTR InstName R5
@@ -80,7 +80,7 @@ SYMATTR Value 73.2K
 SYMATTR SpiceLine tol=1 pwr=.1
 SYMBOL cap 544 384 R0
 WINDOW 3 24 60 Left 2
-SYMATTR Value 47µ
+SYMATTR Value 100µ
 SYMATTR InstName C4
 SYMBOL cap 272 272 R0
 SYMATTR InstName C5
@@ -89,7 +89,7 @@ SYMBOL voltage -672 160 R0
 WINDOW 123 0 0 Left 2
 WINDOW 39 0 0 Left 2
 WINDOW 3 -384 266 Left 2
-SYMATTR Value EXP(12 9 1.2ms 1ms 1ms 1.5ms)
+SYMATTR Value SINE(10 1 1000 1.5ms)
 SYMATTR InstName V1
 SYMBOL cap -464 32 R0
 WINDOW 3 41 31 Left 2
@@ -139,6 +139,6 @@ SYMATTR Type diode
 SYMBOL ind 848 368 R0
 SYMATTR InstName L1
 SYMATTR Value 470µ
-SYMATTR SpiceLine Rser=4
+SYMATTR SpiceLine Rser=5
 TEXT 568 600 Left 2 !.tran 5ms startup
 TEXT -720 -72 Left 2 ;Evaluate D1 for 4A v. 5A, based on the initial inrush.